Introduction to Digital Electronics
Number Sytem
Number Sytem
Number Sytem
Logic gates
SOP to POS and POS to SOP Conversion
Review of code
Introduction to K-Map
K - Map
K - Map
Boolean Algebra
NAND AND NOR ONLY IMPLEMENTATION OF LOGIC CIRCUITS
K-Map with don’t care conditions
Implementation of logic gates using NAND and NOR
5 variable K- Map
Introduction to Digital logic Family
5 variable K- Map
Quine- Mc cluskey method
Quine- Mc cluskey method with don’t care condition
Half adder and Full adder
Quine- Mc cluskey method - POS
Half Subtractor and Full Subtractor
4 bit parallel adder, subtractor, adder/subtractor
Design of Code Converters
Binary to BCD and Magnitude comparator
Two and Four bit Magnitude comparator
4 bit BCD adder and 4 bit BCD subtractor
BCD subtractor using 10's complement subtraction
MUX
MUX
DEMUX and Decoder
Decoder and Encoder
Gray to BCD, CLA adder
Decimal to BCD encoder
Introduction to Sequential logic, SR latch using NOR and NAND
D, JK flip flops
Conversion of one flip flop to other, Shift register
Shift regsiter
Universal SR and FSM
FSM
Race around condition , Flip flops, convversions
FSM and 3 bit synchronous up down counter
Counter
Counter
Ring counter, Johnson counter
Johnson self correcting counter, sequence generator
Asynchronous counters
Asynchronous counters
Introduction to Verilog
Verilog Programs
Verilog concepts
Verilog concepts and programs
Verilog concepts and programs
Verilog concepts and programs
Verilog concepts and programs
Verilog concepts and programs
Revision
Revision
Revision
Revision
Revision
Revision
Revision
